➀ The rise of RISC-V cores and the challenges of certification; ➁ The role of Breker Verification Systems in the certification process; ➂ The complexity of certifying RISC-V ISA implementations and the efforts of RISC-V International.

➀ NVIDIA has announced a new Grace Blackwell platform with the NVIDIA GB200 NVL4, which combines two Arm-based Grace CPUs and four Blackwell GPUs. The platform is designed for lower power deployments with a power consumption of just over 6kW. The NVL4 module is targeted to be a large node with up to 1.3TB of combined coherent memory. ➁ The GB200 NVL4 is set to ship in the second half of 2025. ➂ The NVL4 is designed as an alternative to the higher power and higher GPU count platforms offered by NVIDIA, targeting specific deployment needs.

➀ AMD claims its Ryzen AI 9 HX 375 outperforms Intel's Core Ultra 7 258V in LLM performance; ➁ Benchmarks show a lead of up to 27% in LM Studio; ➂ AMD's Strix Point APUs offer lower latency and better integrated graphics performance.

➀ Researchers from Queen Mary University of London have developed new nanocomposite films from starch, offering a sustainable alternative to petroleum-based materials; ➁ The films are made from abundant natural polymer starch and highly conductive MXene, with potential applications in electronics and sensing; ➂ The nanocomposites can be tailored for various uses, including wearable technology and healthcare, and are biodegradable.

➀ Microsoft's new AI-powered super resolution feature for Windows 11 Photos app faced issues during rollout; ➁ Initially appeared on unsupported devices; ➂ Now failing to come to Copilot+ PCs that should have it.

➀ Google is rumored to switch to TSMC's N3E process for Tensor G5; ➁ The report also clarifies that Google has chosen not to use 2nm technology for Tensor G6; ➂ The move could impact the competition in the AI and smartphone chip markets.

➀ Asus shares official die shots of the Core Ultra 9 285K; ➁ Intel's Arrow Lake architecture and 3D Foveros packaging technology; ➂ Detailed breakdown of each tile's layout and functionality

➀ Imec spin-off Brailsports is developing a platform for optimizing athlete training volumes and schedules based on data analysis; ➁ The platform uses AI models to estimate individual athlete fitness and fatigue, improving performance and reducing injury risk; ➂ The platform is currently operational at cycling team Lotto Dstny, with positive results.

➀ AMD's Ryzen AI 300 MAX series APU is confirmed by the latest chipset driver from ASUS; ➁ The Strix Halo is rumored to be the codename for this series, with top configuration featuring 16 Zen 5 cores and a 40 CU iGPU; ➂ The APU is designed for workstations and premium laptops, with a rumored power consumption of nearly 130W.

➀ Arm is exploring the feasibility of running LLMs on mobile devices; ➁ Arm's optimization techniques for LLMs on mobile; ➂ The importance of practical use cases for LLMs in mobile devices

➀ The research investigates the effects of adding TiC nanoparticles to aluminum alloy 7075, aiming to enhance casting performance and improve fluidity and surface quality; ➁ TiC nanoparticles were introduced in two concentrations, and their impact on fluidity and microstructure was analyzed; ➂ The results showed a significant improvement in fluidity and surface quality, with finer grain sizes and smoother surfaces.

➀ Intel's Core Ultra 200 Series CPUs feature a new design with a changing hotspot, requiring a new cooler; ➁ The new NPU design in the CPUs affects cooling efficiency; ➂ MSI's new MPG CORELIQUID cooler addresses the issue with a UNI bracket.

➀ Broadcom, Charter Communications, and Comcast have announced a joint development of Unified DOCSIS chipsets; ➁ The chipsets enable both FDX and ESD versions of the DOCSIS 4.0 specification; ➂ The collaboration aims to enhance network speeds and operator software integration into next-generation products.

1. Intel plans to upgrade the NPU in its future Arrow Lake Refresh CPUs, requiring a larger die size. 2. The Arrow Lake Refresh will feature an NPU 2.8mm longer than the original Arrow Lake. 3. Motherboard compatibility for the Arrow Lake Refresh will depend on whether Fast Voltage Mode (FMV) is enabled.

Setting things up for what is certainly to be an exciting next few months in the world of CPUs and SoCs, Apple this morning has announced their next-generation M-series chip, the M4. Introduced just over six months after the M3 and the associated 2023 Apple MacBook family, the M4 is going to start its life on a very different track, launching alongside Apple’s newest iPad Pro tablets. With their newest chip, Apple is promising class-leading performance and power efficiency once again, with a particular focus on machine learning/AI performance. The launch of the M4 comes as Apple’s compute product lines have become a bit bifurcated. On the Mac side of matters, all of the current-generation MacBooks are based on the M3 family of chips. On the other hand, the M3 never came to the iPad family – and seemingly never will. Instead, the most recent iPad Pro, launched in 2022, was an M2-based device, and the newly-launched iPad Air for the mid-range market is also using the M2. As a result, the M3 and M4 exist in their own little worlds, at least for the moment. Given the rapid turn-around between the M3 and M4, we’ve not come out of Apple’s latest announcement expecting a ton of changes from one generation to the next. And indeed, details on the new M4 chip are somewhat limited out of the gate, especially as Apple publishes fewer details on the hardware in its iPads in general. Coupled with that is a focus on comparing like-for-like hardware – in this case, M4 iPads to M2 iPads – so information is thinner than I’d like to have. None the less, here’s the AnandTech rundown on what’s new with Apple’s latest M-series SoC. Apple M-Series (Vanilla) SoCs SoC M4 M3 M2 CPU Performance 4-core 4-core 4-core (Avalanche) 16MB Shared L2 CPU Efficiency 6-core 4-core 4-core (Blizzard) 4MB Shared L2 GPU 10-Core Same Architecture as M3 10-Core New Architecture - Mesh Shaders & Ray Tracing 10-Core 3.6 TFLOPS Display Controller 2 Displays? 2 Displays 2 Displays