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November 13
- Tier1 Eye on Expanding Role in Automotive AI➀ The modern automotive market's disruptions are affecting the supply chain, particularly Tier1 suppliers. ➁ The integration of AI in automotive systems is leading to more unified supplier platforms. ➃ DENSO's acquisition of Quadric's GPNPU license and co-development of in-vehicle semiconductors is a significant step in the semiconductor design game for DENSO.
- Signal Integrity Basics➀ Signal Integrity (SI) issues in PCB and package design; ➁ Waveform distortions and time delays; ➂ Types of signal integrity problems like overshoot and ISI; ➃ Transmission line modeling and microstrip/stripline examples; ➄ Minimizing discontinuities and managing reflections; ➅ Mitigating crosstalk and via performance; ➆ Timing and skew considerations in high-speed digital designs.
November 12
- My Conversation with Infinisim – Why Good Enough Isn’t Enough➀ The author discusses the importance of thorough chip design and analysis, highlighting the need for tools like Infinisim to prevent potential failures and maximize performance; ➁ Infinisim's co-founder and CTO, Dr. Zakir H. Syed, shares insights on how their technology addresses these challenges and the industry's tendency to accept suboptimal performance; ➂ The conversation emphasizes the strategic value of using advanced tools for chip design to enhance profitability and competitiveness.
- The Chips R&D Program Seeks to Accelerate Innovation➀ The Chips and Science Act allocates $11 billion for semiconductor R&D; ➁ The program targets five areas including advanced packaging and AI-driven design; ➂ Companies should apply now for funding opportunities.
- Build a 100% Python-based Design environment for Large SoC Designs➀ The need for a Python-based design environment in the semiconductor industry; ➁ The advantages of Python in SoC design; ➂ Python's role in academia and industry; ➃ Defacto's SoC Compiler and its Python API; ➄ Case study on using Python for RTL code generation.
November 8
- Changing RISC-V Verification Requirements, Standardization, Infrastructure➀ The evolving verification requirements of RISC-V as the architecture gains adoption; ➁ The role of standardization and infrastructure in supporting RISC-V’s growth; ➂ Challenges and opportunities in open-source functional verification for RISC-V.
November 7
- Semidynamics: A Single-Software-Stack, Configurable and Customizable RISC-V Solution➀ Semidynamics introduces a unified, programmable solution with a single software stack for Core, Vector, and Tensor processing units; ➁ The company's 'All-in-One IP' solution addresses the challenges of data availability and processing for AI applications; ➂ Semidynamics leverages RISC-V architecture for adaptability and control, offering configurable and customizable IP solutions.
- Synopsys-Ansys 2.5D/3D Multi-Die Design Update: Learning from the Early Adopters➀ The rise of 2.5D and 3D multi-die designs driven by high-performance computing and AI; ➁ Challenges in architecture and early prototyping, including thermal management and mechanical reliability; ➂ The importance of early verification to prevent costly delays and suboptimal performance; ➃ The role of AI in optimizing design processes and outcomes; ➄ The significance of sign-off tools for ensuring reliability and longevity of multi-die designs.
November 6
- Arteris Empowering Advances in Inference Accelerators➀ Systolic arrays face challenges in AI inference due to their structured design; ➁ Arteris NoCs enable flexibility in accelerator arrays; ➂ Innovations like CGRA and dynamic frequency scaling are driving progress in AI hardware.
- The Convergence of Functional with Safety, Security and PPA Verification➀ The challenges of formal verification are discussed, highlighting the importance of making formal verification accessible and scalable. ➁ Axiomise's approach to making formal verification normal through consulting, training, and automated IP is presented. ➂ The Essential Introduction to Practical Formal Verification course is introduced, focusing on making formal verification easy to understand and apply.
- New Product for In-System Test➀ Siemens has introduced a new In-System Test Controller, the ISTC, to enable deterministic in-system testing with the Tessent Streaming Scan Network software. ➁ The ISTC supports all Tessent MissionMode features and can target specific cell-internal and aging defects. ➂ The new product addresses challenges in safety and security, as well as quality in networking and data centers.
November 5
- An Illuminating Real Number Modeling Example in Functional Verification➀ An insightful example of real number modeling (RNM) in functional verification using SV-RNM; ➁ The significance of mixed-signal verification in real-world applications; ➂ Advantages of RNM in speeding up simulation and integrating with digital verification.
- MIPI solutions for driving dual-display foldable devices➀ Mixel's MIPI IP customer, Hercules Microelectronics, creates innovative MIPI solutions for dual-display foldable devices; ➁ Offloading foldable display tasks to an external dual display controller to save power and reduce complexity; ➂ Hercules Microelectronics’ HME-H3 FPGA, integrated with Mixel’s MIPI IP, provides a low-power solution for dual-display devices.
November 4
- Notes from DVCon Europe 2024➀ The DVCon Europe 2024 conference highlighted the rise of AI and software in design and verification. ➁ Keynotes from Infineon and Zyphra discussed AI microcontroller architectures and datacenter-scale AI systems. ➃ Software-defined vehicles and open-source technologies like RISC-V were also key topics.
- KLAC – OK Qtr/Guide – Slow Growth – 2025 Leading Edge Offset by China – Mask Mash➀ KLA reports a solid quarter with modest growth; ➁ China's economic moderation poses uncertainty; ➂ TSMC's spending dominance continues; ➃ KLA faces challenges in reticle inspection market.
November 1
- CEO Interview: Dr. Adam Carter of OpenLight➀ OpenLight is the first open silicon photonics platform with integrated lasers; ➁ Solves challenges in design, manufacturing, and deployment of silicon photonics; ➂ Strongest application areas include data centers, AI/ML, and HPC; ➃ Focuses on scalability and efficiency for photonic components; ➄ Differentiates by enabling direct integration of active components into silicon; ➅ Developing advanced PICs and expanding portfolio with 1.6Tb products.
October 31
- PQShield Demystifies Post-Quantum Cryptography with Leadership Lounge➀ PQShield explains Post-Quantum Cryptography (PQC) in a series of videos; ➁ Discusses the NIST PQC standards and their importance; ➂ Provides insights into the implementation and challenges of PQC.
October 29
- How to Update Your FPGA Devices with Questa➀ Introduces the challenge of updating obsolete FPGA designs; ➁ Explains the benefits of retargeting to newer technologies; ➂ Describes the Questa Equivalent FPGA retargeting flow; ➃ Provides three use cases for applying the flow.
October 27
- LRCX- Coulda been worse but wasn’t so relief rally- Flattish is better than down➀ Lam Research reported better-than-expected revenue and EPS, slightly beating market estimates. ➁ The company's guidance for the next quarter is in line with expectations, showing a slow but steady recovery. ➂ Despite concerns about China's slowing tech spending, Lam Research's focus on tech investments is offsetting the decline.
October 25
- CEO Interview: Sean Park of Point2 Technology➀ Sean Park discusses Point2 Technology's mission to provide ultra-low power, low-latency interconnect solutions for AI/ML datacenters; ➁ He explains the challenges of scaling bandwidth and maintaining efficiency in AI/ML datacenters; ➂ The article explores the company's e-Tube technology and its potential to revolutionize interconnect technology.
- AI Semiconductor Market➀ AI is driving significant growth in the semiconductor industry; ➁ The AI IC market is expected to reach $110 billion in 2024; ➂ NVIDIA leads the AI IC market with a projected revenue of $96 billion.
- The RISC-V and Open-Source Functional Verification Challenge➀ The RISC-V and open-source functional verification challenge highlights the differences in verification processes between RISC-V and ARM cores. ➁ The importance of selecting a reliable IP vendor and the impact of software support on verification is discussed. ➂ The role of RISC-V profiles in simplifying verification and enabling software compatibility is emphasized.
October 24
- Sarcina Democratizes 2.5D Package Design with Bump Pitch Transformers➀ Sarcina Technology addresses the cost and complexity of 2.5D package design with Bump Pitch Transformers; ➁ BPT replaces expensive silicon TSV interposers with cost-effective RDLs; ➂ Sarcina's BPT aims to democratize 2.5D design for various applications like HPC and AI.
- Addressing Reliability and Safety of Power Modules for Electric Vehicles➀ Enhancing the efficiency and safety of electric vehicle power modules; ➁ Addressing challenges such as thermal management and electromigration in early design stages; ➂ Implementing a 'shift left' design methodology to minimize risks and reduce development costs.
October 23
- Shaping Tomorrow’s Semiconductor Technology IEDM 2024➀ The IEDM 2024 conference will be held in San Francisco from December 7th to 11th; ➁ Focus on AI, TSMC's 2nm Logic Platform, and Intel's extreme scaled transistors; ➂ Reflect on 70 years of IEDM history and explore advanced packaging, power transistors, and brain/electronics interfaces.
- SI and PI Update from Cadence on Sigrity X➀ Cadence's Sigrity X utilizes distributed simulation to overcome SI/PI analysis limitations; ➁ Sigrity X offers various tools for specific tasks in PCB and IC package design; ➂ Performance improvements up to 10X faster with Sigrity X, enhancing efficiency in signal and power integrity analysis.
October 22
- Advanced Audio Tightens Integration to Implementation➀ Advanced audio technology is evolving rapidly to meet new demands such as active noise cancellation and 3D audio; ➁ The challenge of optimizing audio algorithms for modern DSPs requires specialized expertise; ➂ MathWorks and Cadence have partnered to streamline the development process with the Hardware Support Package (HSP) and MATLAB/Simulink.
- Unlocking SoC Debugging Challenges: Paving the Way for Efficient Prototyping➀ The increasing complexity of chip design necessitates efficient debugging solutions for successful prototype verification; ➁ Prototyping plays a crucial role in chip verification by enabling real-world scenario testing and early customer demonstrations; ➂ S2C's Prodigy prototyping solution offers a comprehensive debugging platform with tools like real-time control software, design debugging software, Multi-Debug Module, and ProtoBridge co-simulation software.
October 21
- Analog Bits Builds a Road to the Future at TSMC OIP➀ Analog Bits showcased its on-die sensing IP and power management solutions at TSMC OIP; ➁ The company highlighted its progress in 3nm and 2nm technology nodes; ➂ Collaborations with Arm were discussed, focusing on power management and clocking IPs.
October 19
- Clock Aging Issues at Sub-10nm Nodes
➀ Semiconductor chips are tested for reliability before shipment, but clock aging is a subtle reliability effect that may only appear in the long term;
➁ 7nm SoC can have up to 10 billion transistors, and clock aging issues can result in jitter, duty cycle distortion, and increased process variation;
➂ Transistor aging is caused by Hot Carrier Injection (HCI), Negative Base Temperature Instability (NBTI), and Positive Base Temperature Instability (PBTI), and Infinisim's ClockEdge tool can analyze clock aging impacts efficiently;
➃ The ClockEdge tool simulates fresh and aged results to help designers assess the reliability of their designs.