➀ Arrow Electronics launched the AXE5000 starter kit based on Altera's Agilex 5 FPGA (A5EC008BM16AE6S), featuring 85,196 logic elements and a Cortex-A76/A55 dual-core CPU;

➁ The board integrates tensor blocks for AI acceleration (3 TOP/s DSP performance), supports DDR4, PCIe 4.0, 10G Ethernet, and includes 16MB RAM + 32MB QSPI flash;

➂ Offers expandability via CRUVI HS connectors and Arduino MKR interfaces, enabling camera, sensor, and peripheral integrations.

➀ Texas Instruments' TIDA-010241 reference design provides a compact, scalable power solution for high-performance FPGAs, integrating a dual-channel DCAP+ controller (TPS53688), configurable PMIC (TPS650861), and power module (TPSM5D1806);

➁ The design supports dynamic voltage scaling, multi-rail sequencing, and high-current applications (up to 20A), targeting industrial/medical fields like radar systems and medical imaging;

➂ It offers 30% smaller footprint than discrete solutions while meeting strict reliability requirements for defense and semiconductor test equipment.

➀ The Analogue 3D Nintendo 64 remake faces another delay, now pushed to late August due to recent tariff changes, though pre-order prices remain unchanged;

➀ The FPGA-powered console promises 100% cartridge compatibility and 4K HDMI output while retaining original controller ports;

➂ Limited production strategy and high modding costs for original N64 hardware drive interest in this modern retro revival.

➀ QuickLogic's eFPGA IP is now integrated into Faraday's FlashKit™-22RRAM SoC development platform;

➁ The collaboration provides designers with unmatched flexibility and adaptability;

➂ The integration aims to enhance IoT edge solutions.

Fraunhofer IIS has developed a new splitting method for integrating satellites into the 5G network, which allows for the use of different classes of satellites. This method splits the base station, with part of the signal processing occurring in space and the rest on the ground. The approach aims to enhance communication infrastructure flexibility and support the transition from 5G to 6G.

The research is part of the TRANTOR project, which is funded by the European Commission and focuses on preparing the transition of satellite communications from 5G to 6G.

Fraunhofer IIS is also involved in 5G standardization and the European Space Agency's NTN Forum.

➀ Professor Hendrik Wöhrle of the University Duisburg-Essen and Fraunhofer Institute for Microelectronic Circuits and Systems is working to make AI in medicine more efficient, compact, fast, and safe.

➁ His research group combines the expertise of both institutions to develop new hardware and software architectures for embedded systems using AI.

➂ The goal is to create systems that are particularly efficient for AI, machine learning, and robotics, aiming for greater performance, compactness, speed, and energy efficiency, suitable for use in implants or portable devices.

➀ Zero ASIC has launched PlatypusTM, the world's first open-standard eFPGA IP product;

➁ Platypus features 100% open and standardized FPGA architectures;

➂ It also includes 100% open source FPGA bitstream formats.

➀ Altera has launched the new Agilex 3 family, bringing the 2nd gen HyperFlex architecture to the lower-end market segment.

➁ The new Agilex 3 promises higher performance and lower power consumption than the Cyclone V.

➂ The Agilex 3 FPGAs are expected to be widely used in various systems over the next few years.

➀ Logic Fruit Technologies has released a new High-Speed Interface IP stack;

➁ The stack includes PCIe Gen6 Controller IP, PCIe Gen6 PHY IP, and CXL 3 Controller IP;

➂ The solutions ensure seamless data transfer and reliability for advanced computing applications.

➀ CAST today announced a new IP core that implements the SNOW-V stream cipher algorithm;

➁ The core is designed to meet the security and performance demands of modern communication systems;

➂ It is available for ASICs or FPGAs and is believed to be the first commercial offering of its kind.

➀ Intel is in advanced talks to sell a majority stake in its FPGA unit Altera to Silverlake Partners;

➁ Intel had previously considered deals with Bain and San Francisco Partners but is now exclusively discussing with Silverlake;

➂ Intel acquired Altera for $16.7 billion in 2015 and had announced the intention to sell it last October.

➀ PositronAI, a two-year-old startup based in Reno, has raised $23.5 million to develop FPGA-based AI inference chips.

➁ The company, which specializes in transformer model inference, has backing from Valor Equity Partners, Atreides Management, Flume Ventures, and Resilience Reserve.

➂ Positron's Atlas V1 device utilizes eight Agilix 7M series FPGAs and boasts performance improvements over Nvidia chips.