➀ SEMI forecasts semiconductor manufacturing equipment sales to grow 7.4% YoY to $125.5B in 2025, with further growth to $138.1B in 2026 driven by logic, memory, and next-gen technologies;

➁ Wafer Fab Equipment (WFE) and backend segments (test, assembly/packaging) show strong growth, fueled by AI, HBM demand, and advanced nodes like 2nm GAA, though automotive/consumer sectors lag;

➂ Regional investments led by China, Taiwan, and Korea face trade policy risks, while NAND/DRAM rebounds highlight memory's role in AI infrastructure.

➀ Raja Koduri joins SanDisk's HBF Technical Advisory Board to advance high-bandwidth flash memory for AI accelerators;

➁ HBF technology enables up to 4TB VRAM on GPUs, targeting 8-16X capacity gains through 3D NAND and TSV integration;

➂ The innovation aims to revolutionize AI training/inference efficiency and edge AI deployment.

➀ The U.S. will allow NVIDIA to resume H20 AI GPU sales to China after a $5.5B export ban loss, with licenses pending approval;

➁ NVIDIA’s China-specific H20 faced prior restrictions under both Biden and Trump administrations, despite CEO Jensen Huang's lobbying against export controls;

➂ The move follows U.S.-China trade talks and rare earth/EDA concessions, though H20 sales remain conditional, pushing NVIDIA to develop compliant alternatives like RTX Pro GPUs.

➀ Cadence launched its LPDDR6 IP with 14.4Gbps performance, enhancing future mobile devices and AI accelerators;

➁ The LPDDR6 memory subsystem supports AI chip designs combining HBM and LPDDR for bandwidth-sensitive workloads;

➂ The IP release aligns with industry trends, enabling next-gen chiplet integration for high-performance computing platforms.

➀ TSMC dominates advanced semiconductor processes, leading to Samsung's 56% profit drop due to HBM delays and foundry losses;

➁ Euro-processor developer SiPearl secures €130m funding amid EU tech sovereignty efforts;

➂ Google invests in nuclear fusion, fission, and renewables to meet surging datacenter energy demands, targeting carbon neutrality by 2030.

➀ Micron announces $200B U.S. investment plan spanning 20+ years, including $150B for six new DRAM fabs (2 in Idaho, 4 in New York) and $50B for domestic R&D;

➁ The first Idaho fab (ID1) will start DRAM production in late 2027, with HBM packaging capabilities added to Virginia facility post-domestic wafer scaling;

➂ While expanding U.S. capacity, Micron’s global DRAM/NAND production will remain predominantly overseas, reflecting strategic balancing of geopolitical demands and economic realities.

➀ The global memory market reached $170 billion in 2024, with DRAM sales at $97 billion and NAND sales at $68 billion, while HBM is projected to grow rapidly, doubling to $34 billion in 2025;

➁ Chinese companies CXMT and YMTC intensified competition by launching cost-effective DDR3/DDR4 and advanced 3D NAND chips, prompting global players to accelerate DDR5 and HBM development;

➂ SK Hynix leads the HBM market (54% share) through partnerships like NVIDIA, while Samsung and Micron ramp up HBM3E production to secure AI-driven growth.

➀ AI GPU power consumption is projected to reach up to 15,360W by 2035, driven by higher compute and HBM integration;

➁ Advanced cooling methods like immersion cooling (for 4,400W-9,000W GPUs) and embedded cooling structures (for 15,360W) will be critical;

➂ Innovations include thermal transmission lines, fluidic TSVs, and double-sided interposers to manage extreme thermal loads.

➀ AMD announced the Instinct MI350 series, currently shipping to customers, featuring HBM3E memory and OAM packaging;

➁ The MI350 utilizes eight HBM3E stacks and two I/O dies, compatible with the OCP UBB platform for scalable 8-GPU configurations;

➂ Both air-cooled (MI350X) and liquid-cooled (MI355X) variants are available, promising higher performance and memory density compared to the previous MI300X generation.

➀ Most commodity components (standard logic, MCUs, etc.) have stabilized in lead times and pricing due to inventory adjustments and conservative procurement, while AI/ML/HPC-related components (DDR5, HBM, SSDs) face tightening supply and rising prices;

➁ Lead times vary across categories: volatile memory (2-22 weeks), storage (6-12 weeks), advanced analog (7-48 weeks), with interconnect prices expected to rise;

➂ External risks like tariffs could disrupt the stabilized supply chain, and procurement remains cautious about long-term orders amid fluctuating demand.

➀ Scientists used a 12-nanometer X-ray beam to non-destructively analyze ultra-thin nanosheets in electronics, revealing deformation mechanisms;

➁ The study identified two competing deformation mechanisms: long-range lattice mismatch and short-range layering effects near edges;

➂ These insights aid in optimizing nanostructures for next-gen microelectronics like GAAFETs, enhancing device performance prediction.

➀ Micron is sampling HBM4 memory stacks based on its 1ß DRAM process and 12-high packaging, aiming for volume production in 2026;

➁ The HBM4 offers 2.0 TB/s bandwidth per stack, 60% faster performance than HBM3E, and 20% improved power efficiency;

➂ SK Hynix plans HBM4 mass production on 3nm in H2 2025, while Samsung develops 4nm-based HBM4, both collaborating with TSMC for base dies and COWOS packaging.

➀ Semiconductor Intelligence releases the list of the top 16 semiconductor companies in Q1 2025, highlighting industry leadership trends;

➀ The article is part of David Manners' 'Ten Best...' series, offering insights into key semiconductor market players;

➂ Included are recommended reads on enterprise WLAN, AR/VR headsets, and supply chain developments, emphasizing broader tech industry shifts.

➀ Micron has commenced shipments of HBM4 memory, delivering 2.0TB/s per stack with a 2048-bit interface, a 60% performance boost over HBM3E;

➁ Initial 36GB stacks target next-gen AI accelerators, built on Micron's 1-beta process with advanced memory testing (MBIST) for reliability;

➂ Full production ramp is planned for 2026, aligning with next-gen AI hardware releases, while future designs may combine HBM with LPDDR for expanded memory capacity.

➀ Intel and SoftBank jointly established Saimemory to develop a stacked DRAM technology as an alternative to HBM, aiming to reduce power consumption by half;

➁ A prototype is expected within two years, with production targeted by the end of the decade, supported by $70 million in total investment, including $21 million from SoftBank;

➂ The technology originated from Intel, Japanese academia, and partners like Riken and Shinko Electric, with potential government funding and priority supply for SoftBank's AI processors (e.g., Arm and Graphcore).

➀ Intel and SoftBank established a joint venture 'Saimemory' to develop a stacked DRAM solution aimed at replacing HBM, targeting a 50% reduction in power consumption for AI data centers;

➁ The technology leverages Intel's patents and Japanese academic research, with prototype validation by 2027 and commercialization before 2030;

➂ Japan aims to re-enter the global memory chip market after two decades, competing with current HBM leaders Samsung, SK Hynix, and Micron.

➀ TSMC showcased its advanced semiconductor technologies at the 2025 Europe Symposium, highlighting N3 nodes' high-volume production with variants for CPUs, cost-effective products, and automotive applications;

➁ Unveiled next-gen N2 and A16/A14 processes with performance/efficiency improvements, and introduced CFET transistor designs achieving double density;

➂ Demonstrated 3D Fabric innovations (SoIC/CoWoS), wafer-scale AI systems (SoW-X), and specialized automotive/IoT solutions including RRAM/MRAM and N4C RF for emerging wireless standards.

➀ NVIDIA plans to launch the Blackwell-based RTX PRO 6000D (B40) in China as a cheaper alternative to the banned H20 GPU, priced between $6,500–$8,000;

➁ The B40 uses GDDR7 memory, avoids TSMC’s CoWoS packaging, and lacks NVLink support, limiting multi-GPU scalability;

➂ Deliveries could begin by Q3 2025, relying on PCIe 6.0 switches and Spectrum-X networking for server integration.

➀ Q1 2025 electronics sales declined 16% QoQ but stayed flat YoY, while IC sales dipped 2% QoQ but surged 23% YoY, fueled by AI and high-performance computing investments;

➁ Semiconductor CapEx fell 7% QoQ but rose 27% YoY, driven by investments in HBM, advanced packaging, and wafer fab equipment (WFE) spending growth;

➂ Global wafer fab capacity expanded to 42.5 million wafers/quarter, with China, Japan, and Taiwan leading growth amid geopolitical risks and uncertain trade policies.