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February 7
- CEO Interview: Mouna Elkhatib of AONDevices
➀ AONDevices specializes in super-low-power Edge AI solutions with a focus on energy efficiency and high accuracy.
➁ The AONx360 platform simplifies ML model creation and deployment.
➂ AONDevices differentiates itself through an end-to-end approach combining ML chips, models, and software.
- Resist Loss Model for the EUV Stochastic Defectivity Cliffs
➀ EUV光刻受到随机缺陷的影响，这些缺陷在曝光剂量的‘悬崖’处增加，即在曝光的上下限处缺陷密度呈指数增长。
➁ 增加的剂量会导致抗蚀剂厚度减少，这是由于氢诱导的蚀刻，这对抗蚀剂性能和缺陷率有影响。
➂ 存在一个最佳入射剂量范围，其中剩余抗蚀剂中吸收的剂量达到最大值，最小化随机缺陷的风险。
February 5
- KLAC Good QTR with AI and HBM drive leading edge and China is Okay
➀ KLA报告第三季度营收31亿美元，非GAAP每股收益8.20美元；
➁ 预计未来季度营收30-35亿美元，非GAAP每股收益7.55-8.65美元；
➂ AI和HBM是推动高端市场增长的关键因素。
February 4
- 2025 Outlook with Uzi Baruch of proteanTecs
➀ proteanTecs提供先进的电子设备，具备自监控功能，以优化性能、降低功耗并防止故障；
➁ proteanTecs的AVS Pro™解决方案为客户实现了显著的节能效果，最高可达14%；
➂ proteanTecs通过生产测试和深度数据可见性解决方案，帮助公司优化芯片性能并缩短上市时间。
- What is Different About Synopsys’ Comprehensive, Scalable Solution for Fast Heterogeneous Integration
➀ Multi-die design and heterogeneous integration are crucial for semiconductor technology scaling.
➁ Synopsys offers a comprehensive suite of solutions for multi-die design challenges.
➂ Detailed insights into multi-die system architecture, verification, implementation, and testing are provided by Synopsys white papers.
January 31
- Automating Formal Verification
➀ LUBIS EDA is a company that specializes in automating formal verification to enhance the reliability of high-risk silicon designs.
➁ Their cloud-based product, LUBIS-on-cloud, simplifies the setup process and uses AI for quick bug detection.
➂ In 2023, they completed over 50 projects, uncovering more than 250 bugs, demonstrating the effectiveness of their verification process.
January 29
- PSS and UVM Work Together for System-Level Verification
➀ PSS and UVM work together for system-level verification, with PSS ideal for system-level testing and UVM for block-level testing.
➁ The Siemens EDA white paper explains methods to enhance collaboration between PSS, UVM, and C, facilitating detailed testing using randomization and coordination across components.
➂ PSS is perfect for building and randomizing scenarios at the system level, connecting to DUT-level testbench components through UVM virtual sequences or high-level C models.
- 2025 Outlook with Volker Politz of Semidynamics
➀ Semidynamics, founded in 2016, transitioned from RISC-V design services to licensing customizable 64-bit RISC-V processor IP in 2019.
➁ UPMEM's selection of Semidynamics' IP for large language models in 2024 led to increased interest from other fabless semiconductor companies.
➂ The company is focusing on providing customized solutions and encouraging early collaboration to address challenges and meet future demands in the AI sector.
January 28
- Will 50% of New High Performance Computing (HPC) Chip Designs be Multi-Die in 2025?
➀ The adoption of multi-die solutions in HPC chip designs is driven by advancements in interconnect technology, thermal management, and power delivery.
➁ Multi-die architectures offer higher performance, design flexibility, and cost efficiency compared to traditional monolithic designs.
➂ The current market demand for scalable, energy-efficient computing, especially in AI and HPC applications, positions multi-die solutions as a crucial component for future semiconductor developments.
- Heterogeneous 2D/3D Packaging Challenges
➀ Modern IC design increasingly uses advanced packages that integrate multiple ICs and high-bandwidth memory, creating complex connectivity that challenges traditional verification methods.
➁ Traditional verification relies on manual processes and spreadsheets, which are inadequate for modern designs with over 500,000 connections, leading to potential errors.
➂ Formal verification offers a powerful alternative by mathematically analyzing all interconnections, ensuring comprehensive and efficient verification of IC packages, thus improving quality and reducing time to market.
January 27
- Webinar: Achieve Full Flow and Resource Management Visibility to Optimize Cost and Sustainability with Innova
➀ Innova's PDM tool helps optimize resource tracking and management, potentially reducing costs by 15-30%.
➁ A holistic approach to chip design enhances cost, schedule, sustainability, and ecological impact management.
➂ The webinar, presented by Dr. Chouki Aktouf, details how Innova tools help monitor ecological impacts like carbon emissions.
January 25
- Crosstalk, 2kAmp power delivery, PAM4, and LPDDR5 analysis at DesignCon
➀ High-speed digital designers face challenges in achieving GHz frequencies and multi-level signaling.
➁ Crosstalk analysis tools like Keysight's Crosstalk Analyzer can save time and cost by automating complex simulations.
➂ Power integrity analysis is crucial for managing power delivery networks in high-power applications like AI chips.
January 24
- 2025 Outlook with Dr Josep Montanyà of Nanusens
➀ Nanusens uses patented technology to fabricate chips with nano-mechanisms (NEMS) using CMOS manufacturing, leading to improved performance, reduced size, and lower costs.
➁ The company validated its RF Digitally Tunable Capacitor (DTC) prototype, increasing antenna efficiency and enhancing smartphone capabilities.
➂ Nanusens plans to focus on RF products initially while exploring future developments in AI processors with their NEMS in CMOS technology.
- 2025 Outlook with Samia Rashid of Infinisim
➀ Infinisim, founded by Samia Rashid, specializes in SoC clock verification solutions for high-performance designs.
➁ In 2024, Infinisim capitalized on the growing demand for AI and data-intensive applications, focusing on clock performance and the challenges of timing jitter and reliability aging.
➂ For 2025, Infinisim anticipates growth driven by the rapid expansion of AI applications, emphasizing the need for precise design methodologies and reducing excessive margins to enhance performance and profitability.
January 23
- 2025 Outlook with Randy Caplan of Silicon Creations
➀ Silicon Creations achieved significant milestones in 2024, including shipping over ten million wafers and reaching 1000 production licenses for its Fractional SoC PLL IP.
➁ The company specializes in mixed-signal IP solutions focusing on clocking and high-speed data interfaces, working with various foundries and advanced process nodes.
➂ In 2025, Silicon Creations anticipates growth in AI accelerator chips, crypto mining, and automotive sectors, driven by customer tapeouts in advanced nodes and early interest in sub-2nm nodes.
- A Deep Dive into SoC Performance Analysis: Optimizing SoC Design Performance Via Hardware-Assisted Verification Platforms
➀ Performance validation in SoC designs is distinct from architectural exploration, focusing on evaluating actual performance to meet specifications.
➁ Hardware-Assisted Verification (HAV) platforms play a crucial role in performance validation by enabling real-world traffic testing and firmware performance tuning.
➂ Part 2 of 2 explores the performance validation process across hardware blocks and firmware in SoC designs, emphasizing the critical role of HAV platforms.
January 22
- 2025 Outlook with Dr Axel Y. Poschmann of PQShield
➀ PQShield contributed to the development of NIST's new PQC standards, marking a significant milestone for post-quantum cryptography implementation.
➁ The company is working on replacing traditional encryption methods like RSA with PQC approaches, focusing on secure transitions amidst evolving threats.
➂ PQShield is collaborating with semiconductor manufacturers and expanding partnerships to develop PQC solutions and meet the growing demand for quantum-safe products.
- 2025 Outlook with Larry Zu of Sarcina Technology
➀ Sarcina Technology, led by Founder and CEO Larry Zu, offers comprehensive post-silicon ecosystem services including package design, assembly, testing, qualification, and production services for leading semiconductor companies.
➁ In 2024, Sarcina developed a Bump Pitch Transformer (BPT) to simplify and reduce costs in 2.5D package designs, addressing challenges related to costly silicon TSV interposers.
➂ Sarcina aims to increase awareness of its capabilities, especially its Application Specific Advanced Package (ASAP) Service, through presentations and participation in industry conferences.
January 21
- 2025 Outlook with Dr. Chouki Aktouf of Defacto
➀ Defacto Technologies, led by Dr. Chouki Aktouf, specializes in innovative SoC design solutions and has become a leader in front-end SoC integration.
➁ In 2024, the company focused on incorporating AI technologies into their R&D projects, aiming to introduce AI-based automation in their tools.
➂ For 2025, the company plans to focus on AI-based EDA and attend key industry conferences like DAC and DATE.
- Webinar: Unlocking Next-Generation Performance for CNNs on RISC-V CPUs
➀ A new architecture for RISC-V CPUs introduces advanced matrix extensions and custom quantization instructions that significantly improve CNN acceleration.
➁ The design features scalable, VLEN-agnostic matrix multiplication instructions, ensuring consistent performance across different hardware configurations.
➂ A 2D load/store unit optimizes memory access for matrices, reducing overhead and increasing computational efficiency.
January 20
- Synopsys Brings Embedded Memory to the Future with its Flexible, IP-Based Compilers
➀ Traditional flash memory is inadequate for modern non-volatile storage needs, leading to the rise of MRAM and RRAM.
➁ Synopsys offers flexible, IP-based compiler solutions for embedded memory, enabling design teams to optimize memory configurations for various applications.
➂ Synopsys collaborates with leading foundries to advance MRAM and RRAM technologies and integrate them into semiconductor designs.
January 15
- 2025 Outlook with Dr. Chouki Aktouf of Innova➀ Discusses Innova's unique software offering for managing design flow and resources; ➁ Highlights the company's success in 2024 in predicting and managing EDA tools and computing servers; ➂ Identifies AI-based EDA as the main growth area for 2025 and Innova's involvement in advanced AI technologies.
January 14
- WEBINAR: Reconcile Design Cost Reduction & Eco-design Criteria for Complex Chip Design Projects➀ The increasing complexity of chip design requires efficient resource management; ➁ AI-based technologies are crucial for optimizing processes; ➂ INNOVA's PDM tool helps predict and manage resource usage; ➃ The platform integrates project management, design flows, and resource optimization.
- Averting Hacks of PCIe® Transport using CMA/SPDM and Advanced Cryptographic Techniques➀ Data security is crucial for PCIe due to increasing digital attack threats; ➁ Technologies like SPDM and CMA are crucial for enabling secure communication in PCIe; ➂ Elliptic Curve Cryptography (ECC) enhances the security framework of PCIe by providing strong security with smaller key sizes.
January 10
- CEO Interview: Dr. Zeynep Bayram of 35ELEMENTS➀ 35ELEMENTS致力于通过开发立方氮化镓半导体材料来帮助实现碳中和；➁ 公司计划在两年内在兼容CMOS的Si(100)衬底上扩大其材料规模，并寻求与代工厂的合作；➂ 35ELEMENTS拥有立方氮化镓材料的独家专利，并计划制造高效的光发射器，如创新型绿色发光二极管。
January 9
- 2025 Outlook with Matt Burns of Samtec➀ Samtec展示了224 Gbps PAM4速度的先进互连平台解决方案；➁ 2024年Samtec面临的最大挑战是满足超大规模企业对GPU和AI加速器的快速增长需求；➂ 预计2025年微同轴和双绞铜电缆的制造以及公司光收发器产品的扩展将实现显著增长。
- Stanford showcases the first 60 GHz GaN IMPATT Oscillator at IEDM 2024➀ Stanford University showcases the first 60 GHz GaN IMPATT oscillator at IEDM 2024; ➁ The oscillator achieves 60 GHz oscillation with an output power of 12.7 dBm; ➂ Key process innovations in edge termination, substrate thinning, and device packaging are introduced by the Stanford team.
January 8
- Stochastic Effects Blur the Resolution Limit of EUV Lithography➀ The resolution limit of EUV lithography is affected by electron blur and stochastic effects; ➁ Stochastic behavior arises from variations in electron scattering and follows Poisson statistics; ➂ As pitch decreases, higher doses are required to maintain image quality, affecting throughput and necessitating new resist materials.
- Semiconductor Industry Update Webinar – Registration Now Open➀ The headline numbers of the annual semiconductor market growth remain strong; ➁ A deeper dive into the details reveals a much bleaker picture with high inventory levels and low capacity utilization; ➂ The webinar will discuss the market outlook for 2025, the return of IC unit growth, and the implications of China's CapEx overspend.
January 7
- CES 2025 and all things Cycling➀ CES 2025 showcased a variety of e-bikes, conversion kits, and accessories; ➁ Brands like Urtopia, Vanpowers, and ENGWE introduced new models; ➂ Indoor cycling trainers and smart bike accessories also made a splash.