➀ US-China trade deficit down 30% from its 2018 peak;
➁ Apple loses market share in China's smartphone market;
➂ TSMC plans an independent GigaFab cluster in Arizona;
➃ Intel to cut 20% of workforce and outsource 2nm processors to TSMC;
➄ Qualcomm files a countersuit against Arm.
➀ Certus Semiconductor has announced an official partnership with TSMC to join the TSMC Intellectual Property (IP) Alliance program;
➁ The program is a key element of the TSMC Open Innovation Platform® (OIP);
➂ The partnership aims to enhance custom I/O and ESD solutions for the semiconductor industry.
➀ TSMC unveiled its next-generation logic process technology, A14, at the North America Technology Symposium;
➁ A14 represents a significant advancement over TSMC's N2 process;
➂ It is designed to enhance AI transformation with faster computing and improved power efficiency.
➀ TSMC's N3 process is expected to be a long-running and high volume node, referred to as 'the last and best finfet node' by Kevin Zhang, SVP for Business Development and Overseas Operations Office.
➁ The N3 process includes multiple variants such as N3B, N3E, N3P, N3X, N3S, N3RF, N3A, and N3C, each tailored for different applications.
➂ TSMC's strategy is to develop a comprehensive and customizable silicon resource with the N3 process, aiming to make integrated silicon performance a platform.
➀ Analog Bits, a mixed-signal IP specialist, is demonstrating its latest LDO, power supply droop detectors, and embedded clock LC PLLs on the TSMC N3P process.
➁ The company is also showcasing clocking PVT and droop detectors on the TSMC N2P process at the TSMC 2025 North America Technology Symposium.
➂ CEO Mahesh Tirupattur emphasizes the importance of power management in architectural design, especially for advanced datacenters, AI/ML applications, and automotive SoC's.
➀ Intel is expected to announce a 20% workforce reduction this weekend, as reported by Bloomberg;
➁ The new CEO, Lip-Bu Tan, has previously criticized Intel's bloated bureaucracy;
➂ Intel has outsourced the compute tile of its Nova Lake processor to TSMC, which is in trial production on TSMC's 2nm process in Hsinchu.
➀ TSMC has chosen a 310x310mm substrate for its initial panel-level packaging (PLP) production, instead of the 510x515mm substrate initially tested.
➁ A source told Nikkei that the decision was made to start with a slightly smaller square shape rather than a larger one used in earlier trials, due to the difficulty of evenly coating the entire substrate with chemicals.
➂ The first production will take place on a pilot line in Taoyuan City in 2017.
➀ TSMC is advancing the production start date for its second Arizona fab, Fab 21, by at least two quarters; the original plan was set for 2028.
➁ Fab 21 is being equipped for a 3nm process, with modules for 2nm and 1.6nm processes to begin construction this year, with production expected in 2029.
➂ TSMC CEO CC Wei states that the expansion will create an independent leading-edge semiconductor manufacturing cluster in the U.S., contributing to a more comprehensive supply chain ecosystem.
➀ TSMC plans to produce 30% of its N2 (2nm-class) output in the U.S., making its Fab 21 site an independent semiconductor manufacturing cluster.
➁ TSMC aims to accelerate the construction of new Fab 21 modules to produce chips on N3 (3nm-class), N2, and A16 (1.6nm-class) nodes.
➂ Around 30% of TSMC's N2 and A16 chips produced in the U.S. will be a significant development.
➀ TSMC reported a 42% year-over-year increase in revenue to $25 billion and a 60% increase in profit to $11.1 billion for the first quarter.
➁ The company expects 20% growth this year and has set its 2025 capital expenditure at $38-42 billion.
➂ For the second quarter, TSMC forecasts revenue between $28.4 and $29.2 billion, up from $20.8 billion in the same quarter last year.
➀ TSMC reported a 41.6% year-on-year increase in Q1 revenues;
➁ March revenues were $8.7 billion, up 10% month-on-month and 46.5% year-on-year;
➂ Total Q1 revenues reached $25.5 billion.
➀ Samsung has established a team to develop 1nm process technology using high-NA EUV machines for mass production in 2029, according to the Seoul Economic Daily.
➁ It is unclear whether Samsung has ordered any of ASML's $350 million high-NA EUV machines.
➂ Samsung denied reports of canceling its 1.4nm process development, admitting project delays and a rumored shift of resources to the 2nm process.
➀ Hailo, a pioneering chipmaker of edge AI processors, has selected Avnet ASIC as its silicon channel partner for future chip production.
➁ Avnet ASIC is a leading provider of ASIC and SoC full turnkey solutions and a business division of Avnet Silica.
➂ The collaboration is for future chips to be produced using TSMC's silicon technology.
➀ Apple preemptively shipped five planeloads of iPhones, PCs, and other devices from India to the U.S. in late March to avoid paying 10% import duty in the U.S. and to stabilize prices temporarily in America.
➁ This move gives Apple an inventory buffer in its largest market, allowing it to assess the impact of new tariffs on its supply chain without urgency.
➂ Apple's manufacturing base spans several countries, with some models produced in India and others in China, Vietnam, and Texas.
Analysts have raised concerns about TSMC's plan to operate or form a joint venture with Intel's fabs. They believe the differences in manufacturing and operations would hinder success. Citigroup suggests that Intel's foundry has failed to compete with TSMC and that forcing a company to use inferior manufacturing would diminish shareholder value. Lynx Equity questions TSMC's interest in Intel's IFS and the potential risks involved. Bank of America points out the technological mismatch between Intel and TSMC and questions Intel's eligibility for $19 billion in Chips Act funding due to the required majority ownership.
➀ Intel 开始风险生产 18A 处理器；
➁ TI 声称推出首个功能性隔离调制器；
➂ TSMC 在高雄的 2nm 工厂举行产能扩张仪式；
➃ Weebit Nano 讨论下一代非易失性存储器 ReRAM；
➄ Ed Sees The Greenland Opportunity，探讨量子计算的机会；
➅ TSMC 2nm 量产启动；
➆ TI 为紧凑型机器人设计提供电机控制；
➇ 英特尔进入 18A 风险生产阶段。
➀ According to a report, Intel and TSMC are considering a joint venture to operate Intel's fabs.
➁ The White House and the US Department of Commerce are said to be encouraging the agreement.
➂ Intel and other American semiconductor companies would hold the majority of the stock in the joint venture.
➀ Yole Group forecasts the Panel Level Packaging (PLP) market to grow from $160 million to $600 million by 2030 with a CAGR of 27%;
➁ High-density fan-out and ultra-density platforms will dominate the market by 2030, driven by AI;
➂ Samsung Electronics leads the market in 2024, followed by ST, with PTI, SIPLP, and ASE holding less than 10% market share.
➀ Intel has entered risk production on 18A, a process designed to compete with TSMC's 2nm technology;
➁ Kevin O'Buckley, SVP of Foundry Services, emphasized the importance of risk production in scaling up manufacturing;
➂ The 18A process features backside power delivery, a feature not present in TSMC's 2nm process;
➃ Intel is expected to use the 18A process for its next processor generation, Panther Lake.
➀ TSMC is expected to earn $60 billion in revenues from manufacturing 2nm wafers before Intel makes any significant money from the technology.
➁ The US government's decision to distribute the $250 billion Chips and Science Act money widely is criticized.
➂ Intel's share of the act, $19 billion, seems insufficient compared to TSMC's $30-40 billion 2025 capex and expected revenues.
