1. TSMC is investing in a European fab in Dresden, Germany; 2. A UK startup with notable backers has unveiled an AI chip; 3. UCL has joined the UK’s largest regional space cluster, Space South Central.

1. Alphawave Semi introduces the industry's first UCIe Die-to-Die IP at 3nm using TSMC's CoWoS advanced packaging technology; 2. The IP offers 8 Tbps/mm bandwidth density and supports 24 Gbps device-to-device data rates; 3. Aimed at hyperscale, high-performance computing, and AI applications, the IP features high interoperability and robust performance.

1. TSMC is set to break ground on its first European fab in Dresden, Germany, in August. 2. The fab, named European Semiconductor Manufacturing Corporation (ESMC), is expected to start operations in late 2027. 3. The project involves investments from Infineon, Bosch, and NXP, with each contributing €500 million for a 10% stake in ESMC, which has a total cost of $10.8 billion.

1. TSMC reported record revenue in Q2-2024, indicating the semiconductor industry is recovering from a downcycle. 2. The company introduced its Foundry 2.0 strategy, focusing on advanced packaging and 3D integration. 3. TSMC is transitioning from a components company to a subsystems company, aiming to control more of the supply chain.

1. Alphawave Semi claims to have successfully brought up the first 3nm UCIe Die-to-Die (D2D) IP with TSMC's CoWoS advanced packaging technology. 2. The complete PHY and Controller subsystem was developed in collaboration with TSMC, targeting applications like hyperscaler, HPC, and AI. 3. The IP supports multiple protocols and integrates live per-lane health monitoring, setting a new benchmark in high-performance connectivity solutions.

1. TSMC has experienced a significant post-pandemic rise in financial performance, with revenues and profits doubling in a few years. 2. The company's net margin in the fourth quarter of 2023 was 38.2 percent, significantly higher than the industry average of 22.5 percent. 3. TSMC's revenue in the second quarter of 2024 was primarily driven by HPC (High-Performance Computing) and smartphone chips, with HPC showing a 28 percent quarter-over-quarter increase.

1. TSMC declined NVIDIA's request for a dedicated packaging line for its GPUs. 2. The request was made during a meeting between NVIDIA CEO Jensen Huang and TSMC executives. 3. TSMC is struggling to meet the high demand for advanced packaging capacity due to the booming AI market.

1. Avnet ASIC introduces ultra-low-power design services for TSMC's 4nm process node; 2. Services aim to enhance power efficiency and performance in high-performance applications like blockchain and AI edge computing; 3. Part of Avnet Silica, an Avnet company.

1. Avnet ASIC has launched design services for TSMC's 4nm and below process technologies. 2. The services include optimizing power, performance, and area (PPA) tradeoffs and enhancing power optimization through transistor-level simulations. 3. Avnet ASIC has been appointed as a Value Chain Aggregator (VCA) by TSMC, offering a full turnkey solution from design inception to mass production.

1. TSMC's Trusted Foundry strategy has limited Samsung's market share to non-TSMC customers. 2. Intel's IDM 2.0 has shown impressive progress and could potentially take market share from Samsung. 3. TSMC's Foundry 2.0 strategy focuses on expanding products and services, with N2 and N2P technologies expected to lead in performance and power efficiency.

1. TSMC's Q2 revenue increased by 33% year-on-year to $20.8 billion, with net income up 36% to $7.6 billion. 2. Advanced technologies, including 3nm, 5nm, and 7nm, accounted for 67% of total wafer revenue. 3. The company expects strong demand for its leading-edge process technologies in the third quarter, driven by smartphone and AI-related applications.

1. TSMC's Q2 2024 revenue reached $20.82 billion, marking the best quarter in the company's history. 2. HPC revenue share exceeded 52%, driven by AI processor demand and a rebound in the PC market. 3. Advanced technologies (N3, N5, N7) accounted for 67% of total wafer revenue, with N3 process technologies contributing 15%.

1. TSMC's June revenue reached $6.4 billion, a decrease of 9.5% from May but an increase of 32.9% year-over-year. 2. Revenue for the first half of the year totaled $39 billion, up 28% compared to the same period in 2023. 3. The semiconductor giant continues to show strong growth despite monthly fluctuations.

1. A Taiwanese research firm predicts that TSMC will continue to lead in foundry services until at least 2032. 2. The Industrial Technology Research Institute director states that Taiwan will remain the largest logic semiconductor manufacturer globally for the next eight years. 3. The US is expected to account for 28% of leading-edge manufacturing in this sector.

1. TSMC and Global Unichip have secured bulk orders for base dies used in SK hynix's next-gen HBM4 memory. 2. The collaboration between TSMC and Creative is focused on developing HBM key peripheral components for AI servers. 3. The industry anticipates significant changes in HBM4, including increased stack height and the integration of logic ICs to enhance bandwidth transmission speeds.

1. NVIDIA has reportedly placed additional orders with TSMC for its Blackwell platform chips, including GB200, B100, and B200, due to high demand for AI chips. 2. The increased production volume has led to a surge in orders for back-end packaging and testing plants, with ASE Investment Holdings and KYEC experiencing a doubling of related order volume. 3. The complexity and testing time for NVIDIA's new Blackwell chips have increased, positively impacting the average selling price and gross profit margin of third-party companies involved in the testing process.

1. TSMC is reportedly developing rectangular substrate carriers to support larger interposer sizes, aiming to address the growing demand for larger compute chiplets and HBM chips. 2. The current production of interposers on traditional round wafers results in limited yields due to the increasing size requirements of modern chips. 3. TSMC's move towards larger, rectangular substrates could significantly increase the number and size of interposers that can be produced, potentially alleviating supply constraints.

1. TSMC is exploring a 'radically new' semiconductor packaging technique called panel-level packaging. 2. Panel-level packaging uses rectangular substrates instead of conventional round wafers, which can accommodate more chips. 3. The research is still in early stages and would require significant development of production tools and materials, as well as a potential overhaul of facilities for a long-term plan.

1. Bernstein analysts have increased the price target for TSMC's shares; 2. TSMC is expected to exceed its 2024 guidance driven by demand from US tech giants and the success of the N3 process node; 3. Continued growth in data center AI revenue and the launch of new smartphones with AI capabilities contribute to TSMC's success.

1. TSMC is reportedly exploring the use of 510x515 mm rectangular silicon wafers. 2. This move could triple the usable area compared to the current 300mm diameter technology. 3. The research is focused on advanced chip packaging.