semiwiki
Author page description
August 1
- proteanTecs Introduces a Safety Monitoring Solution #61DAC1. proteanTecs introduces a Real Time Safety Monitoring (RTSM) solution for automotive electronics at DAC 2024; 2. The solution monitors chip performance in real-time under actual workloads to predict and prevent failures; 3. RTSM uses embedded sensors, sophisticated software, and AI to ensure system reliability and performance.
- Defacto Technologies and ARM, Joint SoC Flow at #61DAC1. Defacto Technologies and ARM have developed a joint SoC design flow using Arm IP Explorer and Defacto’s SoC compiler. 2. This automated approach significantly reduces manual effort and speeds up the design process. 3. Defacto's tools support configuration with RISC-V cores and scripting languages like Python, Tcl, Java, Ruby, and C++. 4. The company's EDA spinout, Innova, predicts EDA license and compute resource needs using an AI engine.
July 31
- Theorem Proving for Multipliers. Innovation in Verification1. The article discusses the use of theorem proving methods for verifying complex multiplier circuits, especially those used in AI and cryptography. 2. It highlights a new approach using ACL2 theorem prover and carry-save notation to efficiently verify correctness of multipliers. 3. The authors propose novel rewrite rules that significantly reduce equation complexity, enabling faster verification times.
- TSMC’s business update and launch of a new Strategy1. TSMC reported record revenue in Q2-2024, indicating the semiconductor industry is recovering from a downcycle. 2. The company introduced its Foundry 2.0 strategy, focusing on advanced packaging and 3D integration. 3. TSMC is transitioning from a components company to a subsystems company, aiming to control more of the supply chain.
July 30
- CAST, a Small Company with a Large Impact on Many Growth Markets #61DAC1. CAST, a small company, has a significant impact on various growth markets with its diverse product line and unique business model. 2. The company has a strong history and strategic leadership, with over 30 years of experience in the semiconductor IP market. 3. CAST's support model includes a small direct team and a network of over 100 partner staff, ensuring high-quality IP and excellent customer support.
- AMIQ EDA Integrated Development Environment #61DAC1. AMIQ EDA introduces an Integrated Development Environment (IDE) at DAC to enhance RTL code creation and error checking. 2. The IDE supports multiple languages and features auto-completion, auto-suggestions, and templates to reduce errors. 3. The IDE includes advanced features like incremental compilation, code refactoring, and automatic FSM diagram generation.
July 29
- Alphawave Semi Tapes Out Industry-First, Multi-Protocol I/O Connectivity Chiplet for HPC and AI Infrastructure1. Alphawave Semi has developed the industry's first multi-protocol I/O connectivity chiplet for HPC and AI, delivering 1.6Tbps throughput; 2. The chiplet supports various protocols including PCIe, CXL, and Ethernet, enhancing data transfer efficiency and AI model training; 3. Alphawave Semi's focus on both technical and business factors is driving the adoption and sustainability of chiplet technology in high-performance computing and AI applications.
July 26
- CEO Interview: Dr. Babak Taheri of Silvaco1. Dr. Babak Taheri discusses his role as CEO of Silvaco, a provider of software platforms for design and fabrication. 2. Silvaco specializes in AI-assisted digital twin modeling, serving markets like automotive, display, and memory. 3. The company faces challenges in managing complexity, time-to-market, and cost management in the semiconductor industry.
- Empowering AI, Hyperscale and Data Center Connectivity with PAM4 SerDes Technology1. PAM4 SerDes technology significantly enhances data throughput and power efficiency for AI and data center applications; 2. The technology supports various reach requirements, from long to short, ensuring reliable and high-speed data transmission; 3. Cadence's advanced SerDes solutions and involvement in the Ultra Ethernet Consortium highlight ongoing innovations in Ethernet technology.
July 25
- Samtec Simplifies Complex Interconnect Design with Solution Blocks1. Samtec introduces Solution Blocks to simplify high-performance interconnect design; 2. The blocks cover various needs including high-speed board-to-board, optics, high-speed cable, and RF interconnect solutions; 3. Solution Blocks offer interactive product selection and support for complex system designs.
- Perforce IP and Design Data Management #61DAC1. Perforce updates on managing costs and footprint in AI; 2. Importance of AI data set management; 3. Plans for commoditization of AI; 4. New features in Perforce Helix IPLM and Helix Core.
July 24
- IROC Introduces an Upgraded Solution for Soft Error Analysis and Mitigation #61DAC1. IROC Technologies introduces an upgraded version of SoCFIT for soft error analysis and mitigation at #61DAC. 2. SoCFIT provides comprehensive error propagation analysis and detailed vulnerability reporting. 3. The new release includes FDR FastSIM, which offers 1,000 times faster fault propagation simulation.
- Cadence® Janus™ Network-on-Chip (NoC)1. Cadence introduces the Janus NoC IP to enhance its system IP portfolio, addressing complex interconnect challenges in SoCs. 2. The Janus NoC provides scalable architecture, efficient communication, and supports dynamic configurations for multi-chip and chiplet designs. 3. It leverages Cadence's extensive software and hardware offerings, ensuring high performance, power efficiency, and area optimization.
July 23
- A Joint Solution Toward SoC Design “Exploration and Integration” released by Defacto #61DAC1. Defacto and Arm have jointly developed an SoC design flow to automate the process from architecture exploration to top-level file generation for implementation and verification. 2. The solution integrates Arm IP Explorer and Defacto’s SoC Compiler, enabling quick generation of multiple SoC configurations and significantly reducing design time. 3. This solution is targeted at Arm users who need to rapidly build new Arm-based SoC configurations, enhancing efficiency and reducing costs and time to market.
July 22
- A New Class of Accelerator Debuts1. Quadric introduces a new accelerator architecture, Chimera, which supports a wide range of applications including signal processing and GenAI, offering up to 864 TOPs. 2. The Chimera approach differs from traditional accelerators by using a common pipeline for all instruction types, simplifying software development and handling complex AI models more efficiently. 3. Quadric's platforms, ranging from QC Nano to QC Ultra, are supported by a mature Chimera SDK, allowing for easy integration of various AI models without extensive tuning.
July 19
- CEO Interview: Orr Danon of Hailo1. Orr Danon, CEO and Co-Founder of Hailo, discusses the company's edge AI-focused chip development. 2. Hailo's key products include the Hailo-8, Hailo-15, and Hailo-10 AI accelerators, enhancing performance in edge devices. 3. The company addresses challenges in AI at the edge, focusing on efficiency, cost, and power consumption.
- TSMC Foundry 2.0 Intel IDM 2.0 and Samsung IDunno 2.01. TSMC's Trusted Foundry strategy has limited Samsung's market share to non-TSMC customers. 2. Intel's IDM 2.0 has shown impressive progress and could potentially take market share from Samsung. 3. TSMC's Foundry 2.0 strategy focuses on expanding products and services, with N2 and N2P technologies expected to lead in performance and power efficiency.
- Blue Cheetah at #61DAC1. Blue Cheetah showcased their focus on advancing chiplet interconnectivity at #61DAC; 2. The company offers customizable IP solutions for chiplet designs, supporting both industry-standard and custom interconnects; 3. Blue Cheetah has collaborated with Baya Systems and Tenstorrent to provide optimized chiplet interconnect IP, enhancing design efficiency and reducing risks.
July 18
- The China Syndrome- The meltdown starts- Trump Trounces Taiwan- Chips Clipped1. The chip industry faces significant challenges due to potential China restrictions and Trump's pressure on Taiwan. 2. US plans to further restrict sales of chip equipment to China, targeting mainly non-US companies like ASML and Tokyo Electron. 3. The potential loss of China market could severely impact US semiconductor equipment companies' profitability.
- Evolution of Prototyping in EDA1. The rapid growth of AI and 5G technologies is driving the evolution of the chip industry, particularly in SoC design. 2. Prototyping, especially FPGA-based, has become essential for verifying complex SoCs due to its speed and cost-effectiveness. 3. Major EDA companies like Synopsys, Cadence, and Siemens EDA have entered the prototyping market, enhancing efficiency and accuracy in SoC designs.
- How Sarcina Revolutionizes Advanced Packaging #61DAC1. Sarcina Technology introduces innovative advanced packaging solutions at #61DAC, focusing on cost-effective and reliable chiplet-based designs. 2. The company collaborates with Keysight Technologies to enhance design and test environments, enabling faster deployment in AI, autonomous driving, and quantum computing. 3. Sarcina's Bump Pitch Transformer package design, using silicon bridge technology, aims to increase interconnect density and democratize 2.5D era technologies.
July 17
- Accelerating Analog Signoff with Parasitics1. Timing closure is critical for final chip design sign-off, especially with increasing interconnect resistance and capacitance parasitics. 2. Analog design lacks automation and heavily relies on handcrafted layouts and hand-estimated parasitics, leading to more post-layout issues. 3. The Cadence Quantus Insight Solution aims to accelerate expert designer insight and suggested fixes before long-cycle layout changes and re-simulation.
- Scientific Analog at #61DAC1. Scientific Analog's XMODEL allows analog modeling in SystemVerilog and UVM; 2. XMODEL uses equations for fast and accurate analog waveform simulation; 3. Over 40 companies and universities use XMODEL for AMS design and verification.
July 16
- PCIe design workflow debuts simulation-driven virtual compliance1. Keysight introduces a smart workflow automation in PCIe Designer, including IBIS-AMI model generation and simulation-driven virtual compliance. 2. The new workflow replaces tedious setups and hard debugging with automation, speeding up design cycles and reducing risk. 3. PCIe Designer offers a unified approach to simulation and compliance testing, allowing for early-stage design validation before hardware commitment.
- The Immensity of Software Development the Challenges of Debugging (Part 1 of 4)1. The article discusses the complexities of developing software for modern System on Chip (SoC) designs, highlighting the multi-layered software stack and the challenges in verification and validation. 2. It emphasizes the significant role of hardware-assisted verification platforms and virtual prototypes in overcoming these challenges. 3. The piece also underscores the importance of early software testing to avoid costly hardware respins and missed market opportunities.
July 15
- Codasip Makes it Easier and Safer to Design Custom RISC-V Processors #61DAC1. Codasip introduces Studio Fusion with Custom Bounded Instructions (CBI) to simplify and secure RISC-V processor customization; 2. CBI ensures that customizations do not cause processor exceptions, reducing development time and risk; 3. Codasip provides comprehensive tools including compiler and debugger, enhancing micro-architectural awareness for better optimization.
July 12
- SEMICON West- Jubilant huge crowds- HBM & AI everywhere – CHIPS Act & IMEC1. SEMICON West saw jubilant crowds and a turnaround from recent downturns, driven by AI and HBM technologies. 2. IMEC's presentations highlighted the importance of CMOS 2.0 and the challenges of AI power requirements. 3. The CHIPS Act and increased public awareness of semiconductors were significant highlights, along with the dominance of TSMC in the foundry market.
- Who Are the Next Anchor Tenants at DAC? #61DAC1. The evolution of #61DAC sees traditional EDA companies like Cadence and Synopsys downsizing their presence, while new entrants like Altair are gaining momentum. 2. Altair, with its comprehensive solutions in simulation, AI, HPC, and data analytics, is poised to become a key anchor tenant at DAC. 3. Altair's strategy includes continuous growth through acquisitions and partnerships, positioning itself as a leader in the electronics systems market.
July 11
- AI Booming is Fueling Interface IP 17% YoY Growth1. AI's growth is significantly driving the semiconductor industry, especially interface IP, which saw a 17% increase in 2023. 2. Interface IP's market share has risen from 18% in 2017 to 28% in 2023, with projections to reach 38% by 2028. 3. Key protocols like PCIe, memory controllers, and Ethernet are expected to see substantial growth, driven by data-centric applications and AI.
- Will Semiconductor earnings live up to the Investor hype?1. The semiconductor industry is showing signs of recovery, with a 29% growth in revenue compared to Q1-23, excluding Nvidia, the growth falls to under 10%. 2. Nvidia's strong performance is driving overall growth, with significant contributions from data centre and AI sales. 3. Inventory levels and revenue predictions suggest a cautious outlook for the industry, with concerns over the sustainability of current growth trends.