➀ Imec inaugurated its new hub in Heilbronn, Germany, focusing on advancing chiplet-based architectures for the automotive industry through collaboration with German industry and research partners;

➁ The hub is a key partner in the CHASSIS project, aiming to develop modular hardware for software-defined vehicles and enhance Europe’s automotive competitiveness;

➂ Imec signed an MoU with the Technical University of Munich to foster knowledge sharing and advanced chip design training, strengthening Baden-Württemberg’s semiconductor ecosystem.

➀ Imec's CMOS 2.0 leverages wafer-to-wafer hybrid bonding (250nm pitch) and backside power delivery networks (BSPDNs) to enable heterogeneous stacking of logic/memory tiers;

➁ Backside connectivity with 120nm-pitch TDVs and extreme wafer thinning optimizes power distribution, reducing IR drops by 122mV in 2nm mobile SoCs;

➂ System-technology co-optimization (STCO) allows specialized functional layers, offering 22% area savings while boosting performance density beyond traditional Moore’s Law scaling.

➀ Imec challenges the perception that deep-tech investments yield only moderate returns, citing McKinsey and BCG data showing a 16% net annual IRR for deep-tech versus 10% for traditional tech with comparable failure rates;

➁ Despite high initial capital needs, deep-tech startups require less funding in later stages, face limited competition, and achieve higher profit margins due to disruptive market creation;

➂ Imec.DeepTechVentures reduces risks through semiconductor R&D expertise, global ecosystem integration, and manufacturing process optimization, accelerating commercialization of innovations like vertical AI compute architectures.