➀ Raspberry Pi has introduced RISC-V cores on its new microcontroller, alongside Arm Cortex-M33 cores, making RISC-V more accessible. ➁ The new microcontroller, Proc0 and Proc1, can be independently set to either Arm Cortex-M33 or RISC-V core at boot. ➂ Raspberry Pi has also launched the Pico 2 development/application board to support the MCU, with additional boards featuring Wi-Fi, Bluetooth, or LoRa announced by other companies.

1. Akeana has announced its RISC-V processor intellectual property, featuring three series of cores. 2. The 100 Series includes configurable 32bit RISC-V cores for embedded microcontrollers. 3. The 1000 and 5000 Series offer 64bit RISC-V cores with advanced features for various applications including laptops, data centers, and cloud infrastructure.

1. Codasip introduces Studio Fusion with Custom Bounded Instructions (CBI) to simplify and secure RISC-V processor customization; 2. CBI ensures that customizations do not cause processor exceptions, reducing development time and risk; 3. Codasip provides comprehensive tools including compiler and debugger, enhancing micro-architectural awareness for better optimization.

1. Breker Verification Systems introduces advanced RISC-V verification solutions at #61DAC, covering core verification and system coherency. 2. The company's Trek family leverages AI technology for test suite synthesis, enhancing bug detection and coverage. 3. Breker's solutions support multiple environments including simulation, emulation, and post-silicon, ensuring comprehensive verification for complex semiconductor designs.

1. Microchip has introduced its first 64-bit processors using the RISC-V instruction set, including an octa-core for space and a quad-core for industrial applications. 2. The company plans to develop future PIC64 families based on both RISC-V and Arm architectures. 3. The PIC64-HPSC space processors are designed for high-performance space-flight computing, offering significant computational improvements and advanced security features.

1. BAE Systems and GlobalFoundries collaborate on secure chip fabrication for aerospace and defense. 2. Europe launches a pilot line for 10nm and 7nm FD-SOI ICs. 3. SiFive introduces its 4th generation RISC-V CPU cores. 4. A startup, Etched, develops AI chips faster than Nvidia's Blackwell. 5. The automotive semiconductor market shows signs of slowing down.

1. SiFive, a leader in RISC-V computing, has announced the fourth generation of its popular Essential product line at the RISC-V Summit Europe 2024. 2. The Essential IP, developed over a decade, is already utilized in billions of products across various sectors including mobile phones, sensors, and smartwatches. 3. This update introduces enhanced performance, improved power efficiency, and more flexible interfaces to further spur innovation in embedded applications.

1. SiFive announced the 4th generation of RISC-V CPU cores for embedded applications at the RISC-V Summit Europe 2024. 2. The new cores include eight models, with three 32bit and five 64bit variants. 3. SiFive claims up to 40% runtime power reduction compared to its third generation, achieved through various optimizations and new power management features.

1. Framework has partnered with DeepComputing to develop a RISC-V mainboard for the Framework Laptop 13. 2. The prototype board features the StarFive JH7110 SoC. 3. It is set to be unveiled at the upcoming RISC-V Summit Europe event.

1. Achronix与Bluespec合作，将RISC-V处理器作为软核集成到Speedster7t FPGA中。2. 双方讨论了合作的动机，包括利用Achronix的2D NoC技术进行紧密的CPU加速。3. Bluespec的RISC-V核心支持定制指令，适用于管理加速器和I/O，与Achronix的FPGA技术形成互补。

1、Synopsys扩展了ARC处理器产品系列，包括RISC-V处理器系列。 2、Synopsys为处理器生态系统提供holistic支持，包括实现、验证、软件开发、DevOps等。 3、Synopsys与Arm和RISC-V核心提供商等合作，提供了广泛的解决方案。