Recent #Marvell Technology news in the semiconductor industry

about 2 months ago

➀ Marvell Technology introduces a 64Gbit/s bi-directional die-to-die interconnect for xPUs on 2nm and 3nm processes;

➁ The interface achieves over 30Tbit/s/mm bandwidth density, exceeding UCIe by 3x, with adaptive power management reducing consumption by up to 75%;

➂ Features include redundant lanes, automatic repair, and a complete stack spanning application bridge, link layers, and physical interconnect.

2nmChipletMarvell Technology
over 1 year ago
1. Marvell Technology introduces the new Alaska P PCIe retimer product line, designed for scaling data center compute fabrics. 2. The first products in this line are 8- and 16-lane PCIe Gen 6 retimers, enhancing connections between AI accelerators, GPUs, CPUs, and other components. 3. The 16-lane PCIe 6 retimer operates at an industry-low power consumption of 10 watts, addressing signal degradation and ensuring reliable communication.
AI acceleratorsMarvell TechnologyPCIe Gen 6 Retimer