05/21/2025, 04:07 PM UTC
Creonic推出oFEC编解码器IP核心，扩展面向ASIC和FPGA的高速网络解决方案Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA
➀ Creonic发布全新oFEC编解码器IP核心，面向下一代光通信和高速通信系统；
➁ 该IP核心支持ASIC与FPGA配置，提供高度灵活性和可扩展性；
➂ 进一步强化公司在电信与高性能计算（HPC）领域的网络解决方案产品组合。
➀ Creonic launches a new oFEC codec IP core for next-gen optical and high-speed communication systems;
➁ The IP core supports both ASIC and FPGA configurations, offering flexibility and scalability;
➂ Enhances Creonic's portfolio for advanced networking solutions in telecommunications and HPC applications.
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