06/25/2025, 06:01 PM UTC
Sofics在台积电2nm工艺上实现接近物理极限的卓 越PPA&R性能Sofics Delivers Remarkable PPA & R Performance Near Physical Limits on TSMC 2nm Technology
➀ Sofics宣布其IP在台积电2nm制程上通过硅验证，实现接近物理极限的功耗、性能与面积（PPA）指标；
➁ 该IP专注提升先进集成电路的内建鲁棒性，满足下一代半导体设计的严苛要求；
➂ 采用台积电纳米片晶体管架构，奠定该技术在尖端应用中的优势地位。
➀ Sofics announces silicon validation of its IP on TSMC's 2nm technology, achieving exceptional power, performance, and area (PPA) metrics near physical limits;
➁ The IP focuses on built-in robustness for advanced integrated circuits, addressing demanding requirements in next-generation semiconductor designs;
➂ Implementation leverages TSMC's nanosheet transistor architecture, positioning the technology for cutting-edge applications.
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