08/21/2024, 09:12 PM UTC
HBM芯片PI-SI联合仿真HBM Chip PI-SI Cosimulation
➀ 现代电子设计趋势要求SI-PI联合仿真，以在降低功耗和电压水平的同时提高速率。➁ PDN应仔细建模，以最小化I/O驱动器看到的输入阻抗，并与信道模型结合，准确预测输出眼图。➂ 文章详细介绍了基于HBM的SI-PI联合仿真的完整建模过程，强调了芯片和封装级别高频PDN设计时应考虑的方面。➀ Modern electronic design trends necessitate SI-PI cosimulation to minimize power consumption and voltage levels while increasing speed. ➁ The PDN should be meticulously modeled to minimize input impedance seen by I/O drivers, and combined with channel models to accurately predict output eye diagrams. ➂ The article details the complete modeling process of SI-PI cosimulation based on HBM, highlighting considerations for high-frequency PDN design at the chip and package levels.
---
本文由大语言模型（LLM）生成，旨在为读者提供半导体新闻内容的知识扩展（Beta）。
