SemiVoice

➀ VeriSilicon launched ZSP5000 DSP series IPs based on fifth-generation architecture for computer vision and embedded AI;

➁ The series features scalable, energy-efficient design targeting edge intelligence devices;

➂ Combined with AI software ecosystem partnerships, it enhances efficiency in automotive/industrial edge computing.

➀ Arteris won the 'AI Engineering Innovation Award' at the 2025 AI Breakthrough Awards for its system IP technology;

➁ The company was recognized for accelerating AI chip design and SoC creation to meet growing compute demands;

➂ This award highlights Arteris' leadership in enabling AI hardware advancements through interconnect solutions.

➀ Sofics announces silicon validation of its IP on TSMC's 2nm technology, achieving exceptional power, performance, and area (PPA) metrics near physical limits;

➁ The IP focuses on built-in robustness for advanced integrated circuits, addressing demanding requirements in next-generation semiconductor designs;

➂ Implementation leverages TSMC's nanosheet transistor architecture, positioning the technology for cutting-edge applications.

➀ AWS's custom Trainium and Graviton chips gain momentum in AI infrastructure, challenging Nvidia's dominance;

➁ Increased adoption driven by cost efficiency and performance optimization tailored for cloud workloads;

➂ AWS reinforces its silicon strategy with enhanced software stacks and developer ecosystems to attract enterprise clients

➀ CAST introduces the MC-SDMA Multi-Channel Streaming DMA IP core to reduce the CPU's workload by managing data transfers between system memory and peripherals;

➁ The IP core supports multiple channels and streaming interfaces, improving efficiency and system performance for resource-intensive applications;

➂ Designed for real-time systems and complex SoC designs, it offloads data transfer tasks to enhance overall processing capabilities.

➀ Cadence expands collaboration with Samsung Foundry, signing multi-year IP agreement to develop memory/interface IP for SF4X, SF5A and SF2P nodes;

➁ Utilizes AI-driven design tools to optimize performance, power and area for complex 3D-IC and chiplet systems;

➂ Targets next-gen applications in AI data centers, automotive electronics and connectivity solutions.

➀ VeriSilicon's NPU IP achieves >40 TOPS for on-device LLM inference;

➁ Targets mobile applications with optimized energy efficiency;

➂ Addresses growing demand for generative AI in edge devices

➀ ICsense, Europe's leading IC design company, reported record revenue exceeding €20 million for the fiscal year ending March 31, driven by strong ASIC sales and operational efficiency;

➁ The company achieved double-digit operational profit growth, attributed to successful project execution and recurring revenue from ASIC products;

➂ ICsense emphasized its focus on expanding ASIC solutions in automotive, medical, and industrial markets while increasing R&D investments for future growth.

➀ Samsung's 3nm chip yields remain at ~50% after three years of mass production, per South Korean reports;

➁ Major tech clients like NVIDIA and Qualcomm are shifting orders to TSMC due to Samsung's yield challenges;

➂ Samsung continues investing to improve 3nm technology amid intense competition in advanced semiconductor nodes.

➀ NVIDIA and AMD plan to launch scaled-back AI GPUs for China in Q3 2025, complying with U.S. export restrictions;

➁ These GPUs are tailored to support Chinese AI frameworks like DeepSeek while adhering to new regulations;

➂ The move reflects efforts to maintain market presence amid geopolitical trade constraints.

➀ TSMC's first European Design Center in Munich is set to launch in Q3 2025;

➁ Focuses on developing high-density, high-performance, and energy-efficient chips for automotive and industrial applications;

➂ The center will offer design support and collaborate with ecosystem partners to strengthen TSMC's presence in Europe's semiconductor market.

➀ Brite Semiconductor launched Ternary Content-Addressable Memory (TCAM) IP based on 28HKC+ 0.9V/1.8V process, targeting high-performance applications;

➁ The IP features high-frequency operation and low power consumption, addressing growing demands for efficient data lookup in networking and computing;

➂ Designed for applications in networking, data centers, 5G infrastructure, and AI acceleration, enhancing energy efficiency in memory-intensive systems.

➀ Analogue Insight and Tetrivis collaborate on developing Eurytion RFK1, a 12 nm RF chiplet transceiver supporting Ka/Ku-band with 2 GHz programmable bandwidth;

➁ The chiplet integrates Tetrivis' KuKa® IP and a local oscillator, leveraging UCIe standards for scalable connectivity;

➂ Targets applications in satellite communications, 5G, and aerospace due to its wideband performance and compact design.

➀ Creonic launches a new oFEC codec IP core for next-gen optical and high-speed communication systems;

➁ The IP core supports both ASIC and FPGA configurations, offering flexibility and scalability;

➂ Enhances Creonic's portfolio for advanced networking solutions in telecommunications and HPC applications.

➀ MediaTek plans to tape out its 2nm chip in September 2025, a major leap in semiconductor technology;

➁ The development highlights its collaboration with TSMC, leveraging advanced process nodes to compete in mobile and AI markets;

➂ The 2nm chip aims to enhance performance and efficiency for next-gen smartphones and AI-driven applications.

➀ Worldwide silicon wafer shipments grew 2.2% YoY to 2,896 million square inches (MSI) in Q1 2025;

➁ Shipments declined 9.0% quarter-over-quarter compared to Q4 2024;

➂ SEMI Silicon Manufacturers Group (SMG) released the quarterly analysis of silicon wafer industry trends.

➀ The article presents an interview with Scott Bulbrook, President of DA-Integrated, discussing the company's role in the semiconductor industry;

➁ DA-Integrated was founded to address gaps in test development services for advanced Application-Specific Integrated Circuits (ASICs);

➂ The company's vision has evolved to adapt to changing demands, focusing on cutting-edge semiconductor testing solutions.

➀ UCIe drives modern chip design with high-bandwidth data transfer, thermal efficiency, and reduced leakage;

➁ Integrates bioinspired advancements, system co-optimization, and 3D packaging to transform AI, HPC, and consumer electronics;

➂ Advances optical I/O to push technological boundaries in semiconductor innovation.

➀ Aion Silicon (formerly Sondrel) rebrands to focus on advanced SoC and ASIC solutions;

➁ Leverages decades of expertise to address complex semiconductor development challenges;

➂ Introduces new leadership team and vision to enhance customer-centric chip design services.

➀ Certus Semiconductor has announced an official partnership with TSMC to join the TSMC Intellectual Property (IP) Alliance program;

➁ The program is a key element of the TSMC Open Innovation Platform® (OIP);

➂ The partnership aims to enhance custom I/O and ESD solutions for the semiconductor industry.

➀ QuickLogic's eFPGA IP is now integrated into Faraday's FlashKit™-22RRAM SoC development platform;

➁ The collaboration provides designers with unmatched flexibility and adaptability;

➂ The integration aims to enhance IoT edge solutions.

➀ TSMC unveiled its next-generation logic process technology, A14, at the North America Technology Symposium;

➁ A14 represents a significant advancement over TSMC's N2 process;

➂ It is designed to enhance AI transformation with faster computing and improved power efficiency.

➀ KeyASIC, a leading ASIC design services company, has partnered with AnySilicon;

➁ The collaboration aims to expand KeyASIC's marketing reach;

➂ Access to AnySilicon's extensive network of potential customers seeking ASIC design solutions is provided.

➀ The transition from silicon-based components to GaN technology is reshaping the electronics industry;

➁ GaN HEMTs provide superior efficiency and improved thermal management over traditional semiconductors;

➂ This guide is tailored for engineers and enthusiasts in modern electronics.

➀ In the fast-evolving field of electronic design, ensuring the correct operation of complex mixed-signal designs is more critical than ever.

➁ Mixed-signal verification, or AMS verification, is at the core of this challenge, bridging the gap between analog and digital designs in a more digital world.

➂ As these technologies become more complex, understanding AMS verification becomes increasingly important.

➀ The DFN (Dual Flat No-leads) and QFN (Quad Flat No-leads) packages are gaining popularity in high-performance applications due to their compact size and advanced circuitry support.

➁ These packages are used in a wide range of applications, from consumer electronics to automotive systems.

➂ Understanding their specifications can significantly enhance design strategies and product development.

➀ Vertex Growth, a Singapore-based growth-stage venture capital fund, has announced a €10M investment in Dolphin Semiconductor;

➁ The investment aims to support and accelerate the growth strategy of Dolphin Semiconductor;

➂ Dolphin Semiconductor is a leading provider of semiconductor IP solutions specializing in mixed-signal IP design.

➀ GS Microelectronics (GSME) has secured $18 million in growth investment;

➁ The investment is from a consortium of strategic partners and technology funds;

➂ The funds will be used to fuel GSME's growth plans including portfolio diversification and global service expansion.

➀ Omni Design Technologies announced the availability of its high-precision PVT monitor;

➁ The ODT-PVT-ULP-001C-3 integrates seamlessly with a single core-voltage supply and a digital interface;

➂ The monitor supports 3nm technology and single core-voltage supply rail process.

➀ Hailo, a pioneering chipmaker of edge AI processors, has selected Avnet ASIC as its silicon channel partner for future chip production.

➁ Avnet ASIC is a leading provider of ASIC and SoC full turnkey solutions and a business division of Avnet Silica.

➂ The collaboration is for future chips to be produced using TSMC's silicon technology.